关注微信 意见反馈

扫描关注摩尔人半导体招聘

摩尔人招聘
确定

您已提交成功

查看帮助中心
哎呀,这个职位已经下线啦
台积电(中国)有限公司

Physical Design Engineer

  • 9.6万-12万/年
  • 南京
  • |
  • 应届生/在校生
  • |
  • 硕士
  • |
  • 全职

职位诱惑: 设计服务中心

发布时间: 2016-01-21发布

职位描述

Job Description:
1. Be responsible for advanced chip implementation flow development, chip PPA boost, and support headquarter advanced technology for EDA router engagement.
2. ASIC block-level implementation and/or full-chip integration projects.
3. Develop IC design methodology.
Qualifications:
1. MS or PHD in CS,EE related field with experience in APR, physical verification, chip implementation, or CAD algorithm.
2. Expert in ASIC RTL-to-GDS design flow.
3. Solid skill sets of Cadence/Synsopsys/Mentor EDA tools.
4. Experience with TSMC 40nm technology.
5. Experience in implementation signoff.
6. Proven record in production tapeouts.
7. Experience in tapeout with multi-million gates count SOC design. 28nm/40nm design experience is a plus.
8. Capable of executing timing budgeting, synthesis, P&R, CTS, timing closure, DFT, physical verification, DFM and spice simulations.
9. Experience in CAD methodology and problem solving skill.
10. Familiar with Verilog, Perl/Tcl and C/C++.
11. Good communication in English.

职位发布者

7天

简历处理用时

88%

简历及时处理率

台积电(中国)有限公司

台积电(中国)有限公司

领域: 消费电子,通信网络,智能硬件

规模: 1000人以上

主页: http://www.tsmc.com

工作地址:

上海市松江区文翔路4000号台积电(中国)有限公司

查看完整地图