Lead/Senior Design Engineer-前端实现

Position Description:
1.In charge of DDR and HBM IP Front End Implementation.
2.Daily duties include: RTL coding and Integration, Logic Synthesis, DFT, Static Timing Analysis and Post-Simulation.
3.HDL language Knowledge, like verilog is necessary.
4.C/C++/perl/tcl/csh/python, UNIX, Linux experience are plus.
5.Excellent analytical and problem-solving skills. Quick learner-able to learn and apply technical and complex topics.
6.Excellent communication skills and the uncanny ability in a cooperative team environment are required.
7.Self-motivated, result-oriented, can take ownership and follow-through on tasks.

Position Requirements:
Essential Qualifications:
1.Master degree or above, 1-3 work experience
2.Major in Micro-electronics, Electronic Engineering, Computer Science, Information Technology or equivalent
3.Ability to work effectively alone or as well as in the team.
4.Essential that the individual demonstrates strong communication, verbal and written
5.Requires good communication skills in English.

Desirable Qualifications:
1.Good at any following skill sets: ASIC design, FPGA design, Computer architecture, SOC design based on ARM/MIPS.
2.Experience of DDR