射频芯片设计(ADC)
- 30万-42万/年
- 上海
- |
- 3年以上
- |
- 硕士
- |
- 全职
职位诱惑: 年终奖金,五险一金,老板nice,年底双薪,股票期权,成长空间大,技术领先,年度旅游
发布时间: 2017-01-17发布
职位描述
Job description
As a Principal/Staff Analog IC Designer (ADC) at Calterah Semiconductor, he/she will be responsible for designing and implementing CMOS key analog blocks, mainly ADC and filters, from specifications to production. He/she will work in a team to meet scheduled deadlines, performing simulation and participate in layout and testing of the entire IC.
Responsibilities
· Architect and design high performance low power multi-channel ADCs in advanced CMOS process nodes for emerging ADAS applications.
· Design other critical analog blocks for SoCs such as filters/LDOs/clocking
· Work with bench and production testing team to develop testing HW/SW procedures for ADC.
· Work with system team to fully characterize and optimize ADC performance at system level.
Skills required
- Need to have basic knowledge about wireless systems.
- Solid understanding in Analog and RF system design and tradeoffs.
- Solid understanding and design experience in analog circuits, mainly various types of data converters (ADC/DAC, Nyquist and Oversampled), LP/HP/BP Filters (continuous/discrete time), and power management circuits such as LDO and DC-DC converters in CMOS process.
- Chip production experience in various types of ADCs, sigma-delta or SAR ADC preferred.
- Must have basic IC layout skill and can work with custom IC layout designer in floor planning, running LVS/DRC and perform parasitic extraction for post layout simulation.
- Test/debugging knowledge to devise test plan and design for testability.
- Understanding and design experience in RF block design especially PLL/frequency synthesizer in CMOS is a plus.
- Behavior modeling using CppSim/Matlab/Simulink or Verilog is a must.
- Management of IC designers and layout engineers is a plus.
Education
MSEE required; PhD preferred;