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矽昆微电子

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收藏职位
  • 我要分享
  • 14.4万-24万/年
  • 北京
  • |
  • 工作经验不限
  • |
  • 学历不限
  • |
  • 全职

职位诱惑: 五险一金,年终奖金,老板nice,技术领先

发布时间: 2019-01-02发布

职位描述

Job Summary:
PCS subsystem verification and SOC/external IP deployment support
Responsibility:
* Work with global PCS team to get a full deep insight on the design under test
* Subsystem level test bench setup/maintain, methodology deployment, verification component create/maintain
* Deploy SERDES container or provide technical consult support to SOCand external IP teams
* SERDES – SOC development plan alignment, i.e. create/maintain staging plan if needed
Education& Qualifications:
Candidate is preferred to be MSEE with minimum of 1 year, or BSEEwith minimum of 3-yearsexperience in digital ASIC/SOC design verification.
Experience:
1. Complex IP/ASIC/SOC Design Verification, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCI-e, HT, USB, DDR, DisplayPort) or multimedia/video is preferred.
2. Good knowledge of SystemVerilog and OVM is a plus.
3. Good knowledge of Verilog/C/C++/System C/SystemVerilog.
4. Verification insights into random techniques.
5. Verification of large scale ASICs.
6. Experience in power verification is an asset.
7. Verification of Virtualization Components is an asset.
8. Strong C and C++ software development and scripting languages (Perl, C Shell, Makefile, …) experience.
9. Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA).
 

职位发布者

矽昆微电子

ASIC

7天

简历处理用时

99%

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