Analog design engineer
- Solid understanding of analog/mixed signal IC design, including feedback theory, device mismatch, signal noise, phase noise, jitter and jitter tolerance.
- Silicon experience on one or more areas in the following: Sigma delta ADC, SAR ADC, High speed DAC, power management, audio codec, and timing circuits such as PLL, clock-and-data recovery (CDR), TX and RX functions.
- Lab characterization and debug experience is desirable.
- Familiar with EDA tools such as Cadence Design Systems, matlab is a plus
- Verilog & verilogA coding and simulation is a significant plus.
- Must be a self-starter and team player.
M.S./PhD in EE.