哎呀,这个职位已经下线啦
北京华芯通半导体技术有限公司
Verification Sr Staff Engr 1(面议)
- 1.2万-2.4万/年
- 北京
- |
- 10年以上
- |
- 本科
- |
- 全职
职位诱惑: 年终奖金,五险一金,福利好,成长空间大
发布时间: 2017-02-27发布
职位描述
- Location
Beijing/Shanghai/Guiyang - Position Description
Huaxintong Semi-Conductor Technology is currently seeking strong candidates with verification experience to participate in the development of world-class server processors. - Responsibilities
1. Develop verification platform
2. Verification of SoC level design using random methodologies – Test Planning, Implementation and Execution.
3. Work closely with the design group to identify problems
4. Hand-on experience in all domains of complex ASIC DV flow from plan to coverage - Qualifications
1. 10+ years’ experience with Master degree or 12+ years’ experience with Bachelor degree.
2. Experience with at least one complete and successful chip verification
3. Proficient with Verilog, SystemVerilog.
4. C and C++ software development and scripting languages (Perl, C Shell, Makefile, …) experience.
5. Expert in the use of Cadence/Synopsys verification tools
6. Experience with UVM/VMM methodologies is a big plus
7. Strong problem solving, documentation and communication skills.
Skills and Knowledge
1. Verilog/System Verilog
2. Verification Methodologies
3. C/C++
4. Perl, C Shell or Makefile
职位发布者
刘强
HR
7天
简历处理用时
74%