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北京华芯通半导体技术有限公司

Senior Library CAD Engineer(面议)

  • 12万-24万/年
  • 北京
  • |
  • 1-3年
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,福利好,成长空间大

发布时间: 2018-07-20发布

职位描述

  • Location
    Beijing/Shanghai
  • Position Description
    1. Responsible for Library characterization for Memory/Library/other analog IPs. |2. Responsible for quality check of all library files. |3. Responsible for programming to optimize library design flow.|4. Support other teams for verification and test.|5. Library release and library database management.
  • Responsibilities
  • Qualifications
    1. Bachelor degree (or above) in EE、CS or other related engineering field.
    2. At least 2 years’ experience in IC design with library development.
    3.Familiar with IC design flows and EDA tools such as SiliconSmart/Liberate/Virtuoso/Hspice/Calibre.
    4. Prefer experienced in memory or standard library characterization.
    5. Prefer good skills in programming such as C++/Skill/Perl/Tcl/Python.
    6. Patient, a good team player, good communication skills.
    7. English language skill in writing is a must.

职位发布者

刘强

HR

7天

简历处理用时

96%

简历及时处理率

北京华芯通半导体技术有限公司

北京华芯通半导体技术有限公司

领域: 消费电子,智能硬件,安全标签

规模: 200-500人

主页: http://www.hxt-semitech.com

工作地址:

北京

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