哎呀,这个职位已经下线啦
北京华芯通半导体技术有限公司
Junior FPGA Prototyping / Emulation Engineer(面议)
- 1.2万-2.4万/年
- 北京
- |
- 工作经验不限
- |
- 本科
- |
- 全职
职位诱惑: 年终奖金,五险一金,福利好,成长空间大
发布时间: 2018-12-26发布
职位描述
- Location
Beijing - Position Description
Here the Candidate will design, implement, and verify FPGA prototypes of the industry leading server CPU. This is a role for a versatile engineer that includes RTL design, verification, FPGA partitioning and implementation, and lab based bringup of the SoC on FPGAs. This position requires a wide range of skills, and exceptional problem solving ability. |You will be working with architects, designers, software engineers, and verification teams to accomplish your tasks. - Responsibilities
1. Design and implement FPGA based SoC prototyping
2. ASIC to FPGA modification, verification and integration
3. FPGA prototyping SOC system debug and bringup
4. RTL design and verification for some IP
5. Validaiton board development according to project validation requirement - Qualifications
Education and Experience
B.S. or M.S.
Skills and Knowledge
1. Must be Familiar with Verilog, VHDL, and SystemVerilog
2. Good knowledge in FPGA experience including implementation, synthesis (Synplify), timing closure (Vivado/ISE).
3. Good knowledge in ARM based SoC architecture,
4. Familiar with Linux environments and TCL、Perl、Shell script language
5. Plentiful design or verification experience in interface IP , including (PCIE、SATA、DDR4、Ethernet、USB,etc.)
6. Good listen, write and spoken English.
7.Enthusiastic, creative, motivated and goal-oriented team player
8.Hands on with lab FPGA debug methodologies, such as ChipScope, Identify or others.
High speed board design experience is hot plus.
Prototyping system experience is hot plus
Bring up experience in ARM based SOC prototyping system is hot plus
Familiar with HAPS platform or HES platform is hot plus
职位发布者
刘强
7天
简历处理用时
98%