ASIC验证
- 18万-36万/年
- 北京
- |
- 工作经验不限
- |
- 硕士
- |
- 全职
职位诱惑: 年终奖金,五险一金,福利好,老板nice,年底双薪,股票期权,年度旅游,技术领先,成长空间大,交通补助,节日礼物,技能培训
发布时间: 2018-11-14发布
职位描述
Job description:
We are currently looking for engineer who will be responsible for design verification of cutting edge GPU projects. Qualified candidate will participate in and lead SoC level function verification domains including:
1. SoC DV testbench and infrastructure development and maintenance
2. Create and execute SoC testplan including data-path and interrupt, virtualization, security, power management, etc.
3. Implement directed and random test cases in C++/SV, as well as checkers and assertions
4. Support integration and qualification of all the IPs for SoC
5. Help to improve DV environment building flow
Requirement:
- MS with 7+ or BS with 9+ years’ experience in ASIC/SoC design verification
- DV lead experience is a must
- Hand-on experience in all domains of complex ASIC DV flow from plan to coverage, both
- Knowledgeable in C++ & SV development, familiar with scripting languages like Ruby/Perl/Makefile…
- Strong problem solving and communication skills
- Knowledge on computer architecture and PCIe devices is highly preferred
- Good knowledge on verification methodologies like UVM is a big plus
- Experience in power-aware verification is an asset