SOC design manager / senior manager / director

1.      Familiar with ARM /Risc CPU architecture and associated products requirements / peripheral connected devices (ie. UART, I2C, USB …. Etc) in IoT, wireless, or consumer related industries.
2.      Experience in managing SOC design team to go thru at least 3 product development cycles in the areas of spec definition, micro architecture design, Verilog coding, functional verification/ silicon validation.
3.      Hands on experience in vHDL coding, logic synthesis, STA, post layout logic verification and DFT implementation.
4.      Familiar with foundry lib, IP and process technology limitation.
                       
职位要求：
1.    BS, MS or PHD in EE, Microelectronics or computing engineering
2.    5+ years hands on SOC design in vHDL coding, vector generation, model build, and validation platform, plus 3 year experience in managing a SOC team with successful tracking record
3.    Good people and communication skills
4.    Strong in team management, tasks management, performance management and problem solving skills
5.    Project / program management experience would be a good plus.
6.    Familiar with low power design scheme, micro architecture implementation would be a plus.