模拟与射频集成电路版图设计工程师

岗位职责：
1.  熟悉基于CMOS工艺的射频和模拟IC版图设计与校验
2.  后仿真参数提取
3.  负责版图的标准单元设计，模块设计，tape out等
4.  与设计工程师高效合作，完成设计性能指标
任职要求：
1.   本科以上学历，工科相关专业
2.   1年以上相关工作经验
3.   熟练使用各种版图设计工具
4.   熟悉基于CMOS的射频和模拟集成电路的相关知识
5.   良好的口头及书写表达能力，跨团队合作能力
6.   良好的团队合作精神，优秀的学习能力及积极独立的主动工作能力
Analog and RF IC Layout engineer
Position Overview:
1.   Familiar with CMOS analog or RF IC layout, verification of the layout (DRC/ERC/LVS),
2.   RC extraction for post simulation
3.   Responsible for all levels of analog or RF layout from top level floor plan, block level design, top level integration and tape out.
4.   Communicate and get directions from analog design Engineer to ensure high quality.
Requirements:
1.   Above Bachelor degree in Microelectronics or equivalent areas
2.   Must have 1+ year Analog or RF IC layout design experience. Full chip integration and tape out experience is a plus.
3.   Familiar with Cadence virtuoso and Calibre verification tools. Experience with Dracula, Hercules, Assura etc. is a plus.
4.   Must have a good Understanding of basic CMOS design, process and device matching.
5.   A team player with good oral and written communication skills, ability to work in cross-functional team.
6.   Can work highly independently, actively. Good learning ability,communication and teamwork skills.