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北京华芯通半导体技术有限公司

Staff Engineer, Ethernet IP Design

  • 30万-60万/年
  • 上海
  • |
  • 5年以上
  • |
  • 硕士
  • |
  • 全职

职位诱惑: 五险一金,年终奖金,老板nice,成长空间大,技术领先

发布时间: 2018-12-26发布

职位描述

Position Description
Design Ethernet controller, including specification, architecture, micro-architecture, implementation (using Verilog), and verification
 
 
Responsibilities
Join Ethernet controller design team, take responsible of Best in Class server end EMAC controller design, target for low high performance, low cost and low power architecture exploration and IC implementation.
 

Qualifications
5+ years IC industry
Dedicate on Ethernet IP experiences is a plus
Master or above in EE is a plus
 
 
Skills and Knowledge
Programming skills in Verilog HDL
Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation)
Highly motivated and skillful at solving difficult technical problems
Knowledge of bus or low-power design techniques is a plus
 

职位发布者

刘强

7天

简历处理用时

98%

简历及时处理率

北京华芯通半导体技术有限公司

北京华芯通半导体技术有限公司

领域: 消费电子,智能硬件,安全标签

规模: 200-500人

主页: http://www.hxt-semitech.com

工作地址:

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