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Advanced Micro Devices

SMTS Design Verification Engineer

  • 40万-80万/年
  • 上海
  • |
  • 5年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,年度旅游,技术领先,成长空间大,福利好,老板nice,年底双薪,股票期权,天天下午茶,节日礼物,交通补助,技能培训,免费班车

发布时间: 2017-12-28发布

职位描述

  • Job Responsibilities:
    AMD NBIO (North Bridge IO) team delivers industry leading high performance interconnects IP for all AMD products including dGPU, APU, Server and Embedded projects. You'll be working with the global team to execute NBIO subsystem level verification, including verification planning, execution and closure. You’ll grow the NBIO domain expertise to perform as a project lead to take charge of the NBIO subsystem delivery to SOC, support AMD global team for verification partition, functionality explanation, simulation support and documentation.
     
    Responsibility:
    * NBIO Subsystem level test-plan development, verification methodology deployment 
    * NBIO Subsystem level test-bench construction/maintain, verification component create/maintain
    * Test case create/triage to ensure complete simulation coverage and sign-off
    * Deploy NBIO design and verification components to SOC simulation environment and provide technical consultant to SOC teams
     
    Job Requirements:
     
    1.      Candidate is preferred to be MSEE with minimum of 7 years’ experience in digital ASIC/SOC design verification.
    2.      Complex IP/ASIC/SOC Design Verification experience with direct take part projects in high performance IP/SOC or Processor (CPU or GPU)
    3.      Deep knowledge in Industry bus standard (PCI-e, HT, USB, DDR, DisplayPort) is preferred.
    4.      Good knowledge of SystemVerilog and UVM is a plus; Good knowledge of Verilog/C/C++/System C/SystemVerilog or equivalent
    5.      Experience of verification of large scale ASICs with random/assertion based techniques; Experience in power verification is an asset.
    6.      Strong C and C++ software development and scripting languages experience is a plus (Perl, C Shell, Makefile and etc).
    7.      Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA).
    8.      Fluent in oral and writing English, good communication skill
     
     

职位发布者

常畅

HR

7天

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