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美满电子招聘

Design Verification Engineer

收藏职位
  • 我要分享
  • 15万-25万/年
  • 上海
  • |
  • 应届生/在校生
  • |
  • 硕士
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,福利好,成长空间大

发布时间: 2020-09-23发布

职位描述

Job Description
ASIC design verificationengineer responsible for the verification and evaluation of digital circuits inhigh-speed data communication ICs. The candidate will be involved inverification plan development, test environment setup, modeling, test casedevelopment and execution. He/She will be responsible for block and /or chiplevel verification. The IC products to work with include Ethernet/AutomotivePHY/Switch SoC, high speed SerDes based PHYs, and so on.
Job Requirement
MS in EE or CE with VLSIemphasis. Graduate from reputable university with competitive GPA or classranking. Graduate course work in VLSI design, digital circuit theory, logicdesign or computer architecture. Exposure to graduate school projects in ASIC designor verification.
Must be proficient in thefollowing skills:
Fundamental concepts in digital logic design 
Understand ASIC verification flows and methodologies 
Verilog and SystemVerilog/SystemC/Vera 
Strong Perl and Tcl scripting 
UNIX Shell scripting (Csh, Bash)
Highly desirable skills:
Formal verification 
Low power design
MATLAB and C/C++ based system simulation andevaluation
DSP function hardware implementation knowledge

Good personal communicationskills and team working spirit. Hardworking and motivated to be part of ahighly competent design team.

职位发布者

Nancy Wang

HR

7天

简历处理用时

84%

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