Design Verification Engineer
ASIC design verificationengineer responsible for the verification and evaluation of digital circuits inhigh-speed data communication ICs. The candidate will be involved inverification plan development, test environment setup, modeling, test casedevelopment and execution. He/She will be responsible for block and /or chiplevel verification. The IC products to work with include Ethernet/AutomotivePHY/Switch SoC, high speed SerDes based PHYs, and so on.
MS in EE or CE with VLSIemphasis. Graduate from reputable university with competitive GPA or classranking. Graduate course work in VLSI design, digital circuit theory, logicdesign or computer architecture. Exposure to graduate school projects in ASIC designor verification.
Must be proficient in thefollowing skills:
Fundamental concepts in digital logic design
Understand ASIC verification flows and methodologies
Verilog and SystemVerilog/SystemC/Vera
Strong Perl and Tcl scripting
UNIX Shell scripting (Csh, Bash)
Highly desirable skills:
Low power design
MATLAB and C/C++ based system simulation andevaluation
DSP function hardware implementation knowledge
Good personal communicationskills and team working spirit. Hardworking and motivated to be part of ahighly competent design team.