SENIOR VERIFICATION ENGINEER

收藏职位

25万-50万/年
上海
|
3年以上
|
硕士
|
全职

职位诱惑: 技术领先,年终奖金,福利好

发布时间: 2017-11-14发布

职位描述

JOB DESCRIPTION:
-    Participate ASIC digital verification for various PCIe IP/SoC projects;
-    Create PCIe verification plans with designers;
-    Develop DV architecture and verification environment;
-    Verification execution and sign-off;

SKILLS MANDATORY:
-    Excellent team working style;
-    Production experiences on PCIe Gen 3 products;
-    Solid IP/SoC verification background:
-    Mass production for verified IP/SoC
-    Bachelor with 7+ years working experiences on ASIC digital verification (Master with 5+ years )
-    Expert on SystemVerilog/UVM
-    Expert on scripting
-    Good English skills (read and write).