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Synopsys

Serdes Product Design Engineer(Digital)

  • 20万-30万/年
  • 武汉
  • |
  • 3年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 技能培训,年终奖金,五险一金

发布时间: 2019-08-02发布

职位描述

Seeking a highly motivated and innovative digital design and verification engineer with strong theoretical and practical background in high-speed data recovery circuits. Working as part of a highly experienced mixed-signal design team, the candidate will be involved in designing and maintaining current and next generation Backplane Ethernet, PCIe, SATA, and USB 2/3 SERDES products. The position offers excellent opportunity to work with an expert team of digital and mixed signal designers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips. In addition, this is a great opportunity to work with a wide suite of in-house digital design and verification tools, including VCS, Design Compiler, PrimeTime, LEDA.

Responsibilities of this job include: RTL design, writing verilog and system-verilog testbenches; debugging RTL and gate-level simulation failures; performing functional coverage, assertion coverage, and code coverage; defining and validating synthesis constraints, DFT and ATPG vector generation and validation, and interacting with customer support and back-end design teams.

The successful candidate will have MSEE plus at least 2 years of digital design and verification experience in the industry and hands on experience in designing digital circuits and writing testbenches.  Knowledge of DFT design methodologies, familiarity with back-end synthesis tools DC/PT, and scripting using PERL and TCL is a plus.  Also, good organization and communication skills for interacting between different design groups and customer support teams are required.

职位发布者

HR

7天

简历处理用时

97%

简历及时处理率

Synopsys

Synopsys

领域: 消费电子,智能硬件,通信网络

规模: 500-1000人

主页: http://www.synopsys.com

工作地址:

武汉市东湖开发区高新大道999号武汉未来科技城

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