Principal / Lead Product Engineering -PHY/ high speed SerDes

This is a unique opportunity to join the rapidly growing Product Engineering team in the IP Group at Cadence Design Systems. We are looking for a Lead Product Engineer who will be the main technical interface on key customer engagements deploying our advanced high speed PHY and SerDes IP. 
Position is in high speed SerDes R&D team. 
 
Primary Responsibilities:
•            Supporting customers high speed SerDes SOC integration reviews, and system integration questions.
•            Support customers with SerDes silicon bring up and lab testing.
•            Presales technical support of customer demos and evaluations.
•            Primary technical link between SerDes R&D team and Field Application Engineers
•            Generate technical SerDes specification, data sheets, and application notes.
•            Update R&D team with the latest customer feedback and competitive analysis.
                                               
Position Requirements:              
•            M.S. Electrical/Computer Engineering (or similar degree)
•            2+ years experience developing or using high speed PHYs (8Gbps+)
•            Strong debug and problem solving skills.
•            Experience working with USB, SATA, PCIe, or Ethernet protocols.
•            Experience in SOC design implementation, from RTL to final GDS, and production ramp.
•            Verilog design, simulation, and static timing experience.
•            Familiarity with industry standard DFT flows and test methodologies.