Digital Design/Verification Engineer
The Autonomous Inertial group (AIN) focuses in two main markets, the Automotive and the Consumer electronics. Our products are used in a wide variety of applications ranging from automotive safety, navigation systems, to wearables, camera lens, drones, etc., and can be categorized into either Components or Modules. The components are stand-alone packages that measure acceleration (accelerometers) and angular rate measurement (gyroscopes), while the modules are larger units and often a combination of multiple accelerometers and gyroscopes to measure multiple degrees of freedom (DOF) - often 6. Our component products focus in the areas of ultra-low noise, ultra-low lower, and ultra-wide band accelerometers, low noise and in-run bias stability gyroscopes. Our module products focus mainly on the offering of world-best precision Inertial Measurement Units (IMUs). We have design, product test, applications and marketing teams in USA and China.
- Successful candidate will be responsible for the design, verfication and debug tasks in state-of-the art ASICs for MEM's products. Candidate will work with the applicaiton and design team to establish the specifications for MEMs products such as gyroscopes and accelerometers. Candidate will participate in the design and implementation of the building blocks (such as various types of switched cap filters, charge amp, data converters, all in the ultra low power, low voltage domain)
- Candidate will involve in all phases of the ASIC development until product release, and post release support.
- Basic knowledge of MEMs ASIC (accelerometer and/or gyro) is a plus.
- Fundamental understanding of mechanical systems in MEMs sensors is a plus.
- Experienced in designing building blocks such as high performance op-amps, comparators (low power, chopped, noise density in the range of ~12nV/rtHz), switched-cap filter designs (bandpass, lowpass), low-power band gaps.
- Solid device physics (at the transistor level) is required.
- Experienced in ultra-low power SAR, and sigma-delta ADC design is a major plus.
- Understanding of HV designs such as charge pump using DMOS. Solid understanding of device protections of HV design is a plus.
- Familier with analog PLL design (charge pump based), including building blocks such as VCOs, and some fundamental digital designs in PLL.
- Knowledge of basic switched-cap circuits, analysis of noise performance is required.
- Familiar with simulation techniques of switched-cap circuits to verify performance (noise, transfer function)
- Tools: well-fluent in industry standard IC design tools such as Cadence, and spice simulator
- Familiar with measurement equipment such as oscilloscope, jitter analyzer and other lab equipment.
- Good mentoring capability
- Master degree in EE, 3+ years of industry experience