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Advanced Micro Devices

[Image Signal Processor] ISP FPGA

  • 30万-60万/年
  • 上海
  • |
  • 5年以上
  • |
  • 硕士
  • |
  • 全职

职位诱惑: 年终奖金,技术领先,五险一金,成长空间大,福利好,老板nice,通讯津贴,交通补助,节日礼物,年底双薪,技能培训,免费班车

发布时间: 2018-08-24发布

职位描述


AMD Image Signal Processor (ISP) team is looking for a staff level FPGA engineer for a new pioneering project. As a team, you will co-work with camera algorithm, FW, SW and HW expertise and tightly engaged with customers. In this position, you will be responsible for camera subsystem building for pre silicon activities including algorithm prototyping, FW/SW development and HW validation.
 
PREFERRED EXPERIENCE:
·       BS-CS/BS-EE with at least 7 years' experience or MS with at least 5 years' experience in FPGA/RTL design
·       Knowledge of PLD/FPGA design flow using Verilog/VHDL and EDA tools such as Xilinx Vivado, Altera Quartus
·       Development experience with SoC system, e.g. DDR controller, interconnection bus and embedded processor
·       Experience in digital and analog circuit design and debug, camera subsystem experience is a big plus
·       Familiar with lab equipment, such as oscilloscope, logic analyzer, spectrum analyzer
·       Disciplined design approach, and ability to work smoothly with multi teams
·       Strong individual analysis, problem solving skills and teamwork attitude
 
KEY RESPONSIBILITY:
·       Build up camera subsystem on FPGA platform, including camera board design and bring up
·       Develop SoC infrastructure under multi FPGA chips, porting ASIC to FPGA and generate bit file, including simulation, synthesis and P&R
·       support SW/FW/algorithm development and debugging on FPGA platform
·       work with ASIC verification team to complete ISP function validation on FPGA
·       Maintain FPGA platform, solve subsystem issues, and develop scripts to improve FPGA design flow efficiency.
·       Collaborate and interface with local and global management to make accountable deliverables on time
 

职位发布者

Nannie Jiang

HR

7天

简历处理用时

97%

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