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北京华芯通半导体技术有限公司

Senior Staff analog/mixed-signal IC design Engineer

  • 30万-50万/年
  • 上海
  • |
  • 5年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,技术领先,成长空间大

发布时间: 2018-09-29发布

职位描述

Position Description
On this position, you will participate in & lead a team of highly competent Analog designers involved in design, verification, and implementation of advanced platform for HXT's future generation server CPU products.


Responsibilities
1. Lead team members to design analog macros independently.
2. Analog/Mixed-signal IP design which including spec definition, modeling, schematic design, pre/post-layout simulation, and IP bench characterization.
3. Layout design and support. Layout optimizations for high speed or high performance directly.
4. Supporting interface verifications between analog and digital.
5. Work closely with other teams for system level issues in CPU projects.

Qualifications
Education and Experience
1. Bachelor or above with 10+ years of experience in analog/mixed-signal design
2. Experience in finfet process ( 28nm and below ) is a must
3. Experience of design in the following analog IP will be a plus: PLL, IO, clock control, ldo, ad/da, thermal, temp sensor, CPR, pcie, sata, usb

Skills and Knowledge
1. Cadence analog design flow
2. Cadence/Synopsys characterization flow
3. Team build, management, communication and presentation skill

职位发布者

刘强

HR

7天

简历处理用时

91%

简历及时处理率