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Cadence

IP测试工程师

  • 20万-40万/年
  • 南京
  • |
  • 3年以上
  • |
  • 硕士
  • |
  • 全职

职位诱惑: 技术领先,成长空间大,福利好,技能培训

发布时间: 2019-03-14发布

职位描述

-IP bring up and validation including DDR, PCIe, USB, MIPI, Ethernet, High Speed Serdes, AD/DA etc
- Work closely with IP design team to define IP validation test plan for both pre-silicon and post-silicon
- Design and develop the IP validation platforms including software, PCBs and plans
- Lead IP feature bring-up and validation, ensure coverage and schedule
- Design and execute system level tests for complex mixed signal IP/IC using standard test equipment such as Oscilloscopes, network analyzers, etc.
- Lead related engineering teams to debug related issues for IPs
- Work with designers to debug, understand and document new designs
Position Requirements:
- Bachelor degree with 5+ years of applicable experience, Master degree with 3+ years of applicable experience in electrical engineering, microelectronics.
- Ability to work effectively alone or as well as in a team.
- Essential that the individual demonstrates strong communication, verbal and written
- Requires good communication skills in English.
- Familiar with any one of IP protocol, DDR, PCIe, USB, MIPI, Ethernet and high speed serdes is preferred
- Hands-on experience with any one of IP bring up, DDR, PCIe, USB, MIPI, Ethernet, high speed serdes and AD/DA is preferred.
- Strong debugging and test skills, leadership for issue debug and program driving
- Familiar with schematic / PCB layout
- Familiar with low level FW/SW development or ASIC design verification

职位发布者

cadence hr

Sr.Manager&BP

7天

简历处理用时

95%

简历及时处理率

Cadence

Cadence

领域: 移动手持,消费电子,通信网络

规模: 500-1000人

主页: http://www.cadence.com.cn/

工作地址:

浦口大道1号新城总部大厦23楼(10号线,南京工业大学站)

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