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哎呀,这个职位已经下线啦
成都海光集成电路设计有限公司

Methodology Engineer

  • 50万-70万/年
  • 北京
  • |
  • 10年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 五险一金,福利好,老板nice

发布时间: 2018-06-07发布

职位描述

岗位职责:
1、This is a challenging job role to build/enhance top/block PNR flow in advanced technology node(7nm and below)
2、Drive best methodology/flow implementation and work at real design in one or multiple of the following areas:
*Methodology/flow infrastructure (e.g. flow tracer, etc.).
*Synthesis/DFT.
*Top level floorplan/powerplan, feedthrough, pin assignment. repeater/pipeline insertion, chip assembly, bump PNR.
*Full chip/block STA/RC extraction.
*Physical Verification.
*Block level PNR, CTS,H-Tree building.
*Power/IR/EM analysis
*Clock Mesh construction and simulation/annotation.
*Timing/SI, IR/EM/self heat signoff.

任职资格:
1、MSEE with 10+ years of experience with solid academy background/knowledge in multiple areas : device/technology, VLSI design, Synthesis/DFT, timing signoff, STA and STA tool behavior, RC extraction, top/block physical design, ASIC CAD/Methodology.
2、Familiar with and deep understanding of the behavior of PrimeTime, ICC2, starRCXT, redhawk, power theatre, etc.
3、Good programming skills in Perl/Python/Tcl.
4、Good team player, please!

职位发布者

孙晓琛

HR

7天

简历处理用时

94%

简历及时处理率