Full Chip Physical Design Leader

岗位职责:
1、 This is a leadership job role for full chip physical design.
2、 Tasks include hierarchical full chip floorplan/partition work, power planning, bus planning, feedthrough, pin assignments, pipeline/repeater insertion, SOC clock planning, chip assembly, etc.
3、 Work with architecture/RTL design team, system/package team, block level physical design team to drive the achievement of optimum floorplan.
4、 Drive best of the knowledge methodology in all aspects of full chip implementation.

任职资格:
1、MSEE with 15+ years of experience in physical design in both full chip and block level work, CAD/methodology (familiar with AMD FCFP flow is a plus).
2、Solid understanding of full chip tasks and issues facing high performance(2~3GHZ range) and large SOC(300+ sqmm in 7nm).
3、Strong programming skills in Python/Perl/TCL
4、Padring/IO/bump planning, bump routing, ESD, multi-voltage experience is a plus.
5、TSMC 7nm experience is a big plus.