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AMD

SoC DFT Engineer

收藏职位
  • 我要分享
  • 20万-40万/年
  • 北京
  • |
  • 5年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 技术领先,成长空间大,技能培训,年底双薪,年终奖金,五险一金

发布时间: 2020-02-28发布

职位描述

RESPONSIBILITIES:
-      Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
-      Perform verification on all DFT structures
-      Generate DFT related timing constraints and work with PD team for timing closure
-      Generate and verify DFT structural patterns and functional patterns
-      Participate in ATE bring-up and debug the DFT patterns on ATE
-      Design and implement other DFX (debug, characterization, yield etc) logics
 
REQUIREMENTS:
-      Master degree in EE/CS with at least 5 years’ experience, or Bachelor degree with at least 8 years’ experience in IC or semiconductor industry
-      Minimum 3 years of experience in DFx-related areas
-      Hands on working experience on ASIC DFT design and verification, familiar with entire ASIC design flow
-      Strong analytical/problem solving skills and pronounced attention to details.
-      Must be a self-starter and able to independently drive tasks to completion.
-      Strong interpersonal and communication skills

职位发布者

AMD

HR

7天

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