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Cadence

IC静电防护高级工程师 (ESD Sr Engineer)

  • 25万-50万/年
  • 南京
  • |
  • 3年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 技术领先,成长空间大

发布时间: 2019-05-05发布

职位描述


- Lead ESD technology and library development for high-speed serdes
- Develop ESD protection devices, circuits, and design concept
- Develop ESD/LU test procedures, control plans, design rules and guidelines
- Take advantage of simulation, improve design proposals, and complete wafer level and chip level ESD test, and analyze ESD failures, and improve ESD ability
- Provide ESD design support to design and layout teams
- Provide trainings to design and layout engineers addressing ESD aware circuit design and layout
 
QUALIFICATION:
-          MSEE or above with minimum 3+ years of working/research experience in ESD design;
-          Familiar with concept and testing rule of ESD and circuit design
-          Familiar with technical fundamentals of semiconductor device
-          Familiar with IC layout & tape out process
 

职位发布者

cadence hr

Sr.Manager&BP

7天

简历处理用时

93%

简历及时处理率