SOC Integration & Implementation Engineer 芯片集成和实现工程师
SOC Integration & Implementation Engineer (Location: Shanghai or Nanjing)
- Sub-system and chip-level RTL integration.
- Develop SDC and CPF/UPF.
- Logic synthesis, logic-equivalence check, low-power check, power analysis and STA.
- Participate in physical implementation.
- Develop EDA flow and in-house scripts.
- Bachelor, Master or above on Electronics, Communications, Microelectronics Engineering and Computer Science.
- Bachelor with 2+ years or master with 1+experience in digital design based on high-level languages with good knowledge of IC design flow, including synthesis, STA, LEC, low power design
- Familiar with the main EDA tools, such as from Cadence, Synopsys and Mentor, and their related methodology/flow.
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