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Synopsys

IP Application Engineer for MIPI PHY

  • 30万-40万/年
  • 北京
  • |
  • 3年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,技术领先,成长空间大,技能培训

发布时间: 2019-08-02发布

职位描述

This position will work with field engineers and customers who are using or considering Synopsys’ MIPI PHY Intellectual Property (IP). You will have the capability to design and guide customers to implement solutions to complex applications problems independently with little guidance. You will partner with high-tech customers through the full-cycle of ASIC design from installation, training and RTL design to production testing. Authoring application-notes and/or white-papers that promote the IPs’ ease of use, or address specific challenges in the IPs’ usage will also be a responsibility. You will have regular contact with external customers and internal contacts across cross-functional and international teams.

Requirements
· BS with 5+ years or MS with 2+ years of relevant experience.
· Strong understanding of the ASIC design process.
· Working knowledge in Verilog HDL, Synthesis, Simulation, Verification.
· Optional: Additional knowledge in Place and Route, Design Reuse and/or Physical Design or Analog Design.
· Optional: High-speed SERDES interfaces knowledge.
· Strong communication skills – verbal and written are a must.
· Demonstrated leadership skills and ability to interact with customers as well as peers, highly independent with a “can-do” attitude.
· Willing to learn new skills and perform tasks that often go outside of the area of current expertise.

职位发布者

HR

7天

简历处理用时

97%

简历及时处理率