IC Design Engineer
- 30万-50万/年
- 成都
- |
- 3年以上
- |
- 硕士
- |
- 全职
职位诱惑: 五险一金,福利好,技术领先,成长空间大,通讯津贴,交通补助,节日礼物,技能培训
发布时间: 2019-02-27发布
职位描述
JOB DESCRIPTION:
- Chip-level and module-level architecture definition and design
- Module-level synthesis and timing analysis
- Document write for design spec and report
- FPGA/silicon debug on related modules
QUALIFICATIONS:
- BSEE with minimum 3-year experience on SOC/MCU design
- Proficiency in Verilog RTL coding and digital IC design
- Solid knowledge on ARM architecture ,AMBA2.0 and AMBA3.0
- Experience on DMA/DDR/USB/Serdes is plus
- Knowledge on Mix-signal design is plus
- Familiar with low-power design is preferred
- Strong teamwork and communication ability.