System Debug Engineer
Platform system debug engineer in the Shanghai Research & Development Design Center.
We are looking for talents for system debugging to secure the quality of our new APU/CPU .
In this position, you will co-work with different functional teams (BIOS, Firmware, Silicon , Board Design, driver , etc) to enable AMD latest APU/CPU. You will touch cutting edge silicon , OS and hardware technologies. You will have chances to see how they will be implemented in our product.
DESCRIPTION OF DUTIES
1) Study newest AMD hardware and platform features; understand new features in silicon , BIOS, firmware, driver and etc; bring up new product .
2) Hands on debugging issues that are reported by validation team or customers; need to dive into source/code level or have a better understanding of protocol for different buses to root cause the bugs.
3) Issue coordinator. Coordinate resources from silicon design, firmware, gfx driver and other function team to make sure issues are moving forward step by step.
4) Optimize the working process with other team to improve the efficiency
5) Provides detailed input into the platform definition & review of platform designs used in the silicon validation of new processors.
7) Provides technical guidance and training to less experienced engineers and technicians in the planning, test, & debug
8) Innovation in our daily work
1) BS-EE / BS-CE with at least 5+ years directly related experience. An advanced degree will be considered a plus.
2) Strong debugging skills. Can root cause issues from firmware, hardware and OS. Familiar with windows debugger will be a plus .
3) Solid understanding of X86 Architecture , Operating System, Driver, BIOS fundamentals and FW fundamentals;
4) Good understanding or hands on development/debugging experience of PCIE, USB, SAS/SATA, BIOS, Security and etc. Deeply understanding PCIE/SATA/USB protocol will be a plus .
5) For BIOS Domain candidate, good x86 BIOS development background and strong debug skill are required. Experience of debugging ACPI ,USB enumeration, RAID and etc will be a plus .
6) For OS domain candidate , familiar with windows kernel debug or Linux Kernel panic is a must ; Deep understanding of Device power saving status in OS will be a plus .
7) For Hardware and IO domain candidate . Better understanding of the protocol is a must .
Hands on debugging for PCIE/ USB /SAS/SATA will be preferred .
8) Candidate must be a quick learner for new technologies
9) Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout documentation (For Hardware and IO domain candidate)
10) Requires good written and oral communication skills.
11) Demonstrated ability to communicate with a variety of engineering disciplines and management.