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百瑞互联

Physical Design Engineer

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    ¥2k
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  • 25万-50万/年
  • 上海
  • |
  • 1-3年
  • |
  • 本科
  • |
  • 全职

职位诱惑: 股票期权,年终奖金,五险一金,成长空间大,技术领先,老板nice,节日礼物,福利好

发布时间: 2019-05-17发布

职位描述


Job Description
·        Work with our front-end design team to develop leading-edge physical implementations and silicon products
·        Expand your in-depth understanding and experience with physical design tools and flows – Floor planning, Bus / Pin Planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification
·        Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other teams
·        Flow development, Innovation, optimization and scripting
Qualifications
·        BS degree or higher in EE, CE, or CS
·        2+ years hands-on experience as a physical design engineer with expertise in RTL-to-GDSII flow
·        Broad experience including high speed, low power, low cost, with large and small SoC designs utilizing the latest state of the art technology nodes
·        Good knowledge to physical verification for 40nm, 28nm and FinFET
·        Successfully complete product development cycle
·        Strong communication, time management and technical skills
·        Expertise using leading-edge EDA tools (Synopsys, Cadence or Mentor Graphics)
·        Strong debugging and analytical skills
·        English documents reading
·        Good programming in Perl/Python, TCL and Shell programming
·        Self-motivated, team work, and good communication skills
 

职位发布者

鲁冬梅

HR

7天

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