ASIC Verification Engineer 数字电路验证工程师

·        Independent SoC verification
·        Responsible for golden models and micro-architecture using UVM
·        UPF based Low power verification
·        Post simulation and functional pattern generation for testing
·        Support ASIC implementation
·        Support FPGA prototyping
·        Support software and system productions
·        Write verification plan documents
Qualifications
·        2+ years hands-on experience in ASIC RTL design. Experience in Bluetooth, Mobile Computing or IoT is a plus
·        Familiar with UVM verification
·        Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies
·        Experience in crafting testbench environments for block and system level verification
·        Strong debugging and analytical skills
·        ASIC design verification and implementation flow knowledge
·        Good knowledge to UPF and low power verification (for example VCLP, VerdiPA and VCS-NLP)
·        English documents reading
·        Good programming in Perl/Python, TCL and Shell programming
·        Good team work and communication skills