Logic Design Engineer

Logic Design Engineer
 
Job description:

1. Take part in memory subsystem logic design, verification and synthesis.
2. Familiar with DDR SDRAM(DDR3/DDR4/LPDDR4) and AXI is a plus.
3. Familiar with hardware language, such as Verilog.
4. Familiar with verification environment(UVM).
5. Familiar with perl/tcl/csh/python, UNIX, Linux.
6. Good at analyzing and solving problem, be able to explore new area.

1. EE/CS or related graduation.
2. Good at verbal/written English.
3. Team player.