FPGA Engineer
- 15万-25万/年
- 上海
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- 3年以上
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- 本科
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- 全职
职位诱惑: 免费班车,老板nice,福利好,成长空间大,技术领先
发布时间: 2018-11-14发布
职位描述
• Key responsibilities 主要职责
1. Responsible for FPGA design of measurement instruments, such as signal generator, power supply
2. Fully define an FPGA design based on high-level functional requirements
3. Document and review top-level and block architectures
4. Implement blocks in verilog RTL
5. Synthesize and close timing on the design, perform back-end P&R
6. Lab debug and design validation
• Job requirements岗位要求
1. Bachelor degree or above in EE, CS or Automation.
2. 3 - 5 years of the professional experience.
3. Good knowledge/experience in FPGA design.
4. Familiar with typical FPGA improvement platforms such as Xilinx, Altera, Lattice, etc.
5. Familiar with HDL language, such like verilog / system verilog.
6. Good knowledge/experience in FPGA prototyping/demo system design, development, synthesis and application reuse; debugging board.
7. Familiar with lab analysis equipments, such like logic analyzer, oscilloscope.
8. Self-motivated, good communication skill and team work player.
9. Good English skills, both in spoken and written.