Digital Design Engineer
The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for OmniVision's future generation multi-media products
Provide detailed block-level design and documents; develop and execute thorough block level simulation and lab verification plan; participate in the FPGA platform development and lab debugging.
Participate in block level architecture design; assisting embedded FW development.
1. MSEE/CE with 3+ years of industry experience
2. Strong analytical, and problem solving skills as well as hands-on lab debugging skills
3. Good knowledge of RTL simulation and synthesis. Knowledge of design for low power and design for test (DFT)
4. Able to write C/C++ code to model RTL blocks for simulation and verification.
5. Able to write reusable Verilog RTL codes, follow design and DFT guidelines.
6. Able to write verification test plans, and be able to run synthesis, static timing analysis, formal verification.
7. Knowledge in languages relevant to the ASIC development process including Verilog, Unix Scripting, Perl, and Tcl.
8. DSP function implementation experience is a plus.
9. Self-motivated, excellent communication skills and ability to excel in a team environment.