- Skillful capable of AMS layout Design area: Matching sense from transistor, Resistor and capacitor, Power and Ground coupling, Signal path from Differential pairs, etc.
- Proficient with Cadence layout tools specifically Virtuoso XL and Assura (Cadence 6.1 experience a plus)
- Ability to coordinate with the other analog IC circuit layout, ensuring robust, efficient, consistent and successful delivery of analog IC circuit layout.
- Fundamental understanding of IC design technology and process/methodology
- Skilled in Analog IC top level chip assembly including floorplanning and block layout
- Hands-on experience conducting DRC/LVS analysis and recommending appropriate solutions
- BSEE degree with 7+ years of applicable experience in analog design industry.
- Essential that the individual demonstrates strong communication, verbal and written, and project management skills.
- Requires good communication skills in English and Chinese.