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NVIDIA

芯片功耗工程师 ASIC Power Engineer

收藏职位
  • 我要分享
  • 1万-2万/年
  • 上海
  • |
  • 工作经验不限
  • |
  • 本科
  • |
  • 全职

职位诱惑: 成长空间大,技术领先,福利好,免费班车

发布时间: 2019-05-06发布

职位描述

薪资待遇面议

工作职责
1. Create a methodology/algorithm to evaluate power efficiency on high-level (architecture) designs.
2. Support IP designers using the power flow to do the power scrubbing work and improve their power efficiency on micro-arch (ASIC) level.
3. Understand and perform block level and chip-level power analysis.
4. Communicate/Cooperate with local and abroad teams with power-related projects.
5. Co-work with power ARCH team/IP team to evaluate new low-power technologies and improve chip power efficiency.

任职资格
1. MSEE/MSCS postgraduate.
2. Experience in ASIC design/verification, low power knowledge is a strong plus.
3.  Must be familiar with at least one of the programming languages, C/C++ (preferred), Python, Perl.
4. Excellent English writing/speaking skills are desired.
5. Good communication skills.

职位发布者

Heather

HR

7天

简历处理用时

97%

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