前端设计工程师

Front End IC Designer
Responsibilities:
As an IC designer, you will work on the design and implementation of the company's cutting-edge SoCs, including：
-   Block level design, RTL coding, Verification, Debug, and timing analysis.
-   Top and sub-system level integration, verification, debug, and timing analysis.
-   FPGA validation and Silicon bring-up
Qualification:
-   Master of EE/CS with 3+ years of working experience or BSEE with 5+ years working experience
-   Solid understanding of DSP and communication theory
-   Familiar with Verilog HDL, and matlab/C/C++
-   hands-on experience on IC design and popular EDA tools 
-   Good team player, Self-motivated in solving problems
-   Experience on one or more of the following is a plus:
a)      Mapping algorithm to RTL for various computer arithmetic or signal processing.
b)      Various SoC components, such as CPU/DSP, AMBA bus, USB, I2S, SDIO, SPI, DDR, etc.
good tcl/perl/python scripting skills


前端设计工程师
职责描述：
作为前端设计工程师，您将参与一流的智能语音处理SOC设计，包括但不限于：
-   模块级设计，RTL代码设计和验证
-   子系统集成和验证
-   综合和时序分析
-   FPGA 验证和芯片bring up 
任职资格：
-   电子或计算机相关专业硕士毕业，3年相关工作经验； 或是本科毕业，5年相关工作经验。
-   熟悉数字信号处理和数字通信理论
-   精通verilog, matlab和C语言
-   有IC设计项目经验，熟悉相关EDA工具 
-   注重团队合作，善于发现和解决问题
-   有以下一项或多项经验者优先考虑:
a)  信号处理和计算机算法的硬件实现
b)  熟悉CPU/DSP处理器架构，以及常见总线和外设， 如AMBA bus, USB, I2S, SDIO, SPI, DDR等
c)  较好的tcl/perl/python scripting 能力