IC设计经理/主管/高级设计工程师

IC Design Manager/Team Lead/Staff IC designer

Responsibilities:

Lead team and/or work as individual contributor to design and implement the company’s cutting-edge SoCs, includes:

-   SoC partitioning and interface definition

-   Block level design, RTL coding, and verification

-   Specify IP requirements according to product specification, seek and evaluate third party IPs.

-   Design reviews and verification coverage analysis

-   Run Synthesis, formal check, STA; Coordinating backend design, FPGA emulation and silicon bring up

Qualification:

-   MSEE /MSCE with 5+ years(8+ years for manager) experience on IC design, or equivalent

-   Strong skill on Verilog HDL, and matlab/C/C++

-   Multiple projects experience on IC design from specification to netlist.

-   Experience on SoC hardware/software co-design, verification and bring up

-   Well organized, strong communication skill, work smart, and result oriented

-   Experience on one or more of the following is a plus:

a)      Architecture design, partition, and integration of multi-core RISC or DSP

b)      Mapping algorithm to RTL for computer arithmetic or signal processing

c)      Various SoC components, such as on chip bus architecture, level 2 cache/Flash Cache, DDR, USB, QSPI Flash booting, etc 

d)      Hands on experience on low power design, such as multiple Vt, multiple Vdd, dynamic voltage scaling, etc.

IC设计经理/主管/高级设计工程师

职责描述：

带领团队或作为个体贡献者完成公司领先的语音处理SOC芯片设计，包括但不限于：

-   SoC 子系统划分和接口定义

-   模块级设计，RTL编码和验证

-   根据产品规格细化IP需求，寻找并评估第三方IP.

-   定期开展Design reviews 和验证覆盖率分析

-   完成芯片综合, 等效性分析，时序分析，协调后端 APR设计,完成时序收敛， FPGA 验证 和 芯片 bring up

任职资格:

-   硕士毕业，5年以上(设计经理需要8年以上) IC 设计项目经验，或同等经历。

-   熟练掌握和使用Verilog HDL, and matlab/C/C++

-   主导或参与过多个从规格书到netlist的芯片前端设计项目.

-   具有SoC 软硬件协同设计,验证和 bring up的经验

-   具备较强的沟通能力和组织协调能力，结果导向

-   具备以下一项或多项经验将优先考虑:

a)      SOC架构设计, 软硬件划分， 多核异构SOC设计

b)      信号处理和计算机算法的硬件实现

c)      熟悉常见的SOC组件, 如 片上总线架构, level 2 cache/Flash Cache, DDR, USB, QSPI Flash booting等 

d)      低功耗设计的实战经验, 如 multiple Vt, multiple Vdd, dynamic voltage scaling, 等