资深数字后端CAD工程师 （STA）

薪资待遇面议

工作职责
The ideal candidate for this role will have extensive project-based STA experience as well as experience in STA flow development. You will be supporting the day to day STA activities of physical design teams across the company. This will require you to gain an understanding our STA flows and contribute to their improvement by developing and/or enhancing their current functionality.

任职资格
1. MS in EE, CE, CS or equivalent
2. Expertise in the area of static timing analysis for complex sub nanometer designs using EDA tools like Primetime and Tempus.
3. 5 years’ experience in large design STA and timing closure
4. Good understanding of advanced timing methodology concepts like Advanced OCV, statistical STA, multi-voltage domain timing and interconnect mismatch analysis.
5. Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects
6. Must be familiar with the architecture of mobile SOCs and modern GPUs.
7. Software development experience for automation of design flows for synthesis, timing and power analysis.
8. Strong analytical background in modeling and correlation of Silicon data with STA and SPICE.
9. Experience in VLSI design and verification is strongly desired.
10.Working knowledge of Verilog.
11. Research experience in the area of timing analysis of digital circuits is preferred.
12. Programming with C/C++, Matlab,Perl, Tcl, object oriented programing, make
13. Prior methodology development experience