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芯原微电子(成都)有限公司

Senior/Staff Engineer of VPU Design

收藏职位
  • 我要分享
  • 16万-32万/年
  • 成都
  • |
  • 工作经验不限
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,六险一金,年度体检,福利好,老板nice,股票期权,天天下午茶,技术领先,成长空间大,交通补助,节日礼物,技能培训

发布时间: 2019-06-11发布

职位描述

Responsibilities:

  1. Play an important role in defining video IP spec and devising Video IP architecture.
  2. Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis.
  3. Carry out IP level verification or IP blocks integration/implementation.
  4. Help junior engineers to solve technical issues.
  5. Support customers regarding Video IP application.

Requirements:
  1. Bachelor degree or above in EE.
  2. 5+ years of work experience in related areas.
  3. Good knowledge of some of the following general IP: H.264, H.265, MPEG, JPEG, AVS, AVS+ decoder & encoder and so on.
  4. Skilled in the field of digital circuit design, whole digital design flow and EDA tools.
  5. Skilled in some of the following disciplines: RTL coding, C coding, Catapult C coding, simulation, synthesis/DFT/STA. Knowledge about catapult C design flow is a plus.
  6. Key member in at least one mature silicon proven video IP.
  7. Fluent in both English and Chinese.
  8. Self motivated, good communication skill and team work spirit.

职位发布者

胡馨予

HR

7天

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100%

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