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Cadence

Product Validation - 产品验证工程师(数字后端)

  • 13万-15万/年
  • 上海
  • |
  • 应届生/在校生
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,福利好,老板nice

发布时间: 2019-12-09发布

职位描述

The Position Description is:
1. Carry timing correlation check between synthesis tool, P&R tool and signoff tool.
2. Proactively provide STA & delay Calculation development suggestions to R&D.
3. Build up STA & delayCal expertise and deliver support to field team and customers whenever needed.
4. Required to acquire expertise and ownership over existing product components as well as develop brand new product features.

The Position Requirements for are:
1. New graduate Bachelor or Bachelor with 1 year related experience;  
2. Have some IC digital background knowledge;
3. Have some STA related knowledge is a strong plus.
4. Good Unix System knowledge and script skill of TCL/CSH/PERL.
5. Being proactive and self-motivated;
6. Good written English and oral English is a strong plus.

职位发布者

cadence hr

Sr.Manager&BP

7天

简历处理用时

98%

简历及时处理率