FPGA Verification Lead
Intel DCG DEG is looking for an FPGA verification architect/lead to oversee the verification activities for the on-going projects. Within DEG, our primary focus is related to platform based on Xeon processors. As a team, you will co-work with BIOS, BMC and FPGA engineers to develop FPGA IP blocks and POCs, as well as our partner team in PSG.
The successful candidate will lead the chip level verification activities and will be responsible for (but not limited to) the following:
1. Establish verification methodology, architecture, and infrastructure including models, generators, monitors, scoreboards, etc. 2. Work with the design team to establish test priorities and coverage targets. 3. Create verification plans 4. Create and executing test cases 5. Triage regressions, providing reports to the team and driving bug fix activities 6. Collaborate with peers and mentor junior verification engineers on verification methodologies and best practices 7. Provide accurate and timely project schedule estimates
1. Must have a Bachelors or Masters in Computer Science, Computer Engineering, Electrical Engineering or related fields 2. Minimum 8 years’ experience as an FPGA/ ASIC Verification Engineer 3. Experience in developing test bench environments using System Verilog and UVM 4. Experience with both directed and constrained- random stimulus generation 5. Good problem solving and debugging skills 6. Excellent communications skills 7. Team oriented; strong inter- personal skills and ability to understand customer needs, expectations and perspective 8. Demonstrated ability to multitask on multiple projects 9. Rich experience of C, C++, Python, Perl, and/or TCL for SW/HW co-simulation
Additional Qualification and Experience would be helpful
1. Knowledge of CPU architecture and system bus 2. Prior experience working with heterogeneous (FPGA, CPU, GPGPU) hardware systems 3. Knowledge in latest design methodology like CUDA, OpenCL