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百瑞互联

ASIC Design Engineer 数字芯片设计工程师(实习生)

收藏职位
  • 我要分享
  • 6万-12万/年
  • 上海
  • |
  • 应届生/在校生
  • |
  • 硕士
  • |
  • 实习

职位诱惑: 年终奖金,福利好,老板nice,股票期权,成长空间大,节日礼物,年度旅游,技术领先,交通补助,技能培训,五险一金

发布时间: 2019-05-17发布

职位描述


·        Independent block and SoC RTL design and verification
·        Analog and digital IP integration
·        RTL handoff quality check using EDA tools
·        Prepare signoff quality full chip SDC file
·        Prepare signoff quality full chip UPF file
·        Support ASIC implementation
·        Support FPGA prototyping
·        Support DFT integration
·        Support software and system production
·        Write design documents
Qualifications
·        2+ years hands-on experience in ASIC RTL design. Experience in Bluetooth, Mobile Computing or IoT is a plus
·        Familiar with popular ASIC solutions (including specification and architecture)
·        Familiar with ASIC design verification and implementation flow
·        Familiar with relevant QA tools (for example Spyglass)
·        Strong debugging and analytical skills, generate ideas, and provide innovative solutions to solve technical problems
·        English documents reading
·        Good programming in Perl/Python, TCL and Shell programming
·        Self-motivated, team work, and good communication skills

 

职位发布者

鲁冬梅

HR

7天

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