哎呀,这个职位已经下线啦
上海燧原科技有限公司
SOC Design Intern
- 5万-6万/年
- 北京
- |
- 应届生/在校生
- |
- 本科
- |
- 实习
职位诱惑: 老板nice,技术领先,成长空间大,技能培训
发布时间: 2019-09-19发布
职位描述
Responsibility and Requirements:
· Responsible for RTL quality lint check and CDC check
· BS/MS in electrical/computer engineering and related;
· Must have good skills in Verilog or SystemVerilog;
· Understanding basic ASIC design flow;
· Sufficient knowledge in Perl/Python/Ruby/Java/C/C++ is a strong plus;
· Hands-on experience in front-end design EDA tools like Simulation/Linting is appreciated as strong plus.
职位发布者
7天
简历处理用时
10%