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Synopsys

上海校招-Digital IP Design Engineer

  • 20万-30万/年
  • 上海
  • |
  • 应届生/在校生
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,技术领先,成长空间大,技能培训

发布时间: 2021-07-29发布

职位描述

Job Title: 上海校招-Digital IP Design Engineer
Location: Shanghai

Responsibility: 

  • This position is for leading edge IP design.
  • Study standard specifications published by JEDEC
  • Define micro architecture at block level based on IP architecture
  • Work on RTL design based on predefined coding style, SVA is also included
  • Clean RTL check violations in lint, CDC, DFT and synthesis
  • Run block level test to speed up IP verification
  • Work with verification to debug and fix RTL issues
  • Check synthesis timing and improve RTL design if required

Qualification:
  • Be familiar with RTL design
  • Be fluent in English, both speaking and writing
  • Knowledge in software programming, e.g. C/C++, Python, is a plus
  • Knowledge in any high performance interface technologies, e.g. DDR, PCIe, ethernet, is a plus
  • Knowledge in any chip infrastructure, e.g. RISC, AMBA protocols, is a plus
  • Has strong desire to learn and explore new technologies
  • Demonstrates good attitude in team work

职位发布者

HR

HR

7天

简历处理用时

99%

简历及时处理率