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大唐恩智浦半导体有限公司

Verification Engineer (Mixed signal)

收藏职位
  • 我要分享
  • 30万-50万/年
  • 上海
  • |
  • 5年以上
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,福利好,年度旅游,成长空间大,通讯津贴,交通补助,节日礼物,技能培训

发布时间: 2019-11-20发布

职位描述

A. Main Purpose of the Role:
Develop Verification Plan for product
Perform verification testing & track product problem
Develop Verification Report for product
Provide procedure and technical training to new engineers
 
B. Key Areas of Accountability:
Develop Verification Plan (include but not limited to: )
- Review product requirement specification and clearly understand each requirement in requirement specification documentation
- Estimate resource (manpower and capital) requirement for certain amount of verification work
- Understand the analysis of hazardous impact of product to different personnel (patient, operator, etc...)
- Develop test case per each requirement in requirement specification documentation
- Schedule test case review meeting with relevant parties
Perform verification testing & track product problem (include but not limited to: )
- Setup test environment per Verification Plan
- Execute each test case on test bays
- Log defect to defect management tool

职位发布者

datang nxp

HR

7天

简历处理用时

100%

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