哎呀，这个职位已经下线啦
上海兆芯集成电路有限公司
ASIC Verification Engineer (X86/SOC)
- 20万-30万/年
- 上海
- |
- 1-3年
- |
- 硕士
- |
- 全职
职位诱惑: 年终奖金,五险一金,福利好,老板nice,技术领先,成长空间大,技能培训,节日礼物
发布时间: 2020-06-05发布
职位描述
- 工作职责：1. ASIC design verification methodology research and development;
2. Verification system development and maintenance;
3. Verification flow and execution ownership.
4. Verification system buildup and debugging;
5. Function vector develop and debugging, coverage analysis and improvement;
6. Function modeling/monitor/assertion and script develop - 任职资格：1. MS/PHD in Microelectronic, Computer Science, Communication, EE, Automation and related
2. Knowledge of digital circuit design and computer system architecture
3. Familiar with Verilog/VHDL, SystemVerilog and C/C++
4. Experience with simulator such as NC/VCS
5. Good team work; strong problem solving and debugging skills;
6. Good English communication skill.
7. Knowledge of Unix platform and csh. Perl or python and tcl programming is a plus
8. Knowledge of X86 architecture is a plus
职位发布者
Seven Pan
7天
简历处理用时
95%
简历及时处理率
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