数字验证工程师【上海】

Job Responsibilities:
Logic Verification Engineer is working on cuttingedge Digital and Mixedsignal IP development for worldwide clients, including High Speed Serial Links, Protocols, Memory Interface, etc. By employing the industry leading tools, state of the art methodology, and innovative semiconductor leading technologies ranging from 32nm to 14nm and beyond, you will be participating in the frontend logic verification or mixed signal verification.

Requirements:
1. ME/EE/CS or background in related areas.
2. Research and/or development experience in one or more of the following areas:
● Logic verification on the basis of the target system specification
● Mixed signal model verification on advanced technologies
● Proficiency in programming and/or scripting languages is a plus
● Knowledge on Protocols, High Speed Serdes or DDR is a plus
3. Experience in one or more of the following application domains, is a plus
● High performance computing system, processor, chipset and ASICs
● High end communication, networking, mobile and data center applications
● Digital signal processing, sensor and Internet of Things
● Other emerging IT technology and industry areas
4. Good English skills, communication skills, and willingness to work with a global team.
5. Good learning competency, selfmotivated, and ability to work in diverse areas in a flexible and dynamic environment.

工作地点：上海、北京