关注微信 意见反馈

扫描关注摩尔人半导体招聘

摩尔人招聘
确定

您已提交成功

查看帮助中心
对职位有兴趣?上传您的简历无需注册,即可直接投递您心仪的职位
云合智网

ASIC Verification Engineer

收藏职位
  • 我要分享
    ¥5k
    什么是入职奖?

    入职奖是企业为了找到像您一样的人才而设立的奖金

    如何领取?

    企业会在您入职并通过试用期后一个月内向您发放全额入职奖

    还有

    摩尔人招聘只展示企业设立的入职奖金,不承担相关连带责任噢

  • 30万-60万/年
  • 上海
  • |
  • 工作经验不限
  • |
  • 本科
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,福利好,老板nice,十五薪,股票期权,技术领先,节日礼物,成长空间大

发布时间: 2021-03-05发布

职位描述

ASIC Verification Engineer
Responsibilities
1. Work with Architecture, Design and Software team to ensure micro-architecture and design is fully verified
2. Contribute to verification infrastructure development
3. Modeling of design modules/interfaces
4. Test plan execution based on functional requirements, drive coverage closure.
5. Real work location is not confined to Shanghai
Skill requirement
1. >1 year hands-on experience in ASIC/FPGA design verification.
2. Master’s degree desired, Bachelor's degree in CS/EE is required.
3. Should have worked on design verification at block/chip-level for complex ASICs.
4. Fluent in System Verilog/C++, script languages such as Python or Perl.
5. Have knowledge of UVM methodology.
6. Experience with code coverage, formal verification tools; familiar with evolving verification methodologies.
7. Experience in the verification of network chip is a big plus.
8. Experience in the verification of SoC and other IPs listed below is a plus: 
High Speed SerDes, PCIE, CPU Subsystem, Ethernet.
9. Highly motivated, positive, detail oriented and responsible
10. Good team player and good communication skills

Contact Info
If you are interested, please send your resume to wangxiujuan@clounix.com
​HR 联系电话:13757103066

职位发布者

杭州云合智网技术有限公司

HR

5天

简历处理用时

100%

简历及时处理率

您还未登录。已有账号, 点此登录,直接投递

推荐朋友

一键投递