Signal and Power Integrity (SI/PI) Engineer

We are looking for a signal and power integrity (SI/PI) Engineer – someone who is excited to join a growing group of diverse individuals responsible for chip package and PCB design analysis to achieve high-speed mixed-signal circuit design challenge, such as USB4, PCI-Express Gen6, and even 100GbE or beyond.
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.
 
 
 
 
What You'll Be Doing:
·        Post-layout model extraction for project review sign-off
·        pre-layout model extraction for DOE 
·        Work closely w/ Package and PCB Design teams to design and ensure link performance meets expectation before tapeout
·        Develop novel algorithms & new methodologies to improve SI/PI/EMI modeling efforts
·        Work w/ Application Engineering teams to support customers w/ SI/PI questions
·        Drive the next generation display (DP2.0/HDMI2.1) and USB4.0, and requirements and product definition
·        Support signal integrity simulation and analysis for interfaces HBM, LPDDR, PCIE, NVLink, etc.
What We Need To See:
·        MS in EE and having experience as a SI/PI engineer
·        Strong understanding of electromagnetics, specifically electromagnetic waves including transmission line theory and via properties, and the SI/PI/EMI applications; S/Y/Z parameters; discrete signal processing knowledge
·        Know how to use ANSYS HFSS/Q3D/SIwave/Designer, Synopsis HSPICE, Cadence PowerSI, and Keysight ADS
·        Understanding of high-volume manufacturing variations and impact to channel signal integrity is a plus
·        Familiarity with high-speed I/O design concepts including clock generation, transmitter & receiver design, and equalization schemes
·        Familiarity with transient simulation in tools and understanding of eye diagram methodology
·        Exposure to lab measurements including VNA & TDR experience 
·        Passionate about SI/PI work
Ways To Stand Out From The Crowd:
·        Exposure to interface timing budgets and system modeling
·        SI analysis flow including frequency and time domain simulation
·        PDN analysis flow including model generation and time domain simulation
·        PSIJ Analyses involving co-simulation of circuits and PDN models
·        On-die PDN modeling; familiarity with ANSYS CSM/REDHAWK
·        Experience w/ Matlab, Python, VBS, and C
·        RF/microwave engineering; EMI/RFI analysis capability